So i'm having trouble implementing my master or slave, not sure yet where is the problem. I'm using an Eaton XV-102 to implement my Mbus TCP/IP slave, which is also a Mbus RTU master, so the tags from RTU i'm doing some ladder logic and updating my Mbus TCP/IP register map, which has 120 registers. Everything on the slave seems to be working fine, the map tags are updated according to my logic, no errors on the bus. And i also implemented the Mbus TCP/IP master, which is to test my main project (Mbus TCP/IP slave), so i added the proper devices, IP, unit ID, and channels using the function Read holding registers, with a length of 120, which is what i have on the slave. I don't have any errors on the bus or nothing, i have it to update my variables in always in bus cycle task (enable 2), but all my values on the master side are false. There is activity on the bus since my xDone and xBusy variables are active, but i'm really not getting any data.
I thought this would be very straightforward, but apparently it isn't, i'm thinking i'm missing a setting, but i'm out of ideas on what to look for.
I need help, any ideas?

Thanks in advance,
Hector